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Page 1 of 13

Journal for Studies in Management and Planning

Available at http://edupediapublications.org/journals/index.php/JSMaP/

ISSN: 2395-0463

Volume 04 Issue 03

March 2018

Available online: http://edupediapublications.org/journals/index.php/JSMaP/ P a g e | 160

3-Ph 3-Level Zvs Dc-Dc Converter

JERRI POTHU NAGARJUNA, M.Tech scholar Sai Tirumala NVR Engineering college, Guntur, India

VENKATESWARAREDDY.G Asst.Professor, Sai Tirumala Nvr Engineering College, Guntur, India

Abstract—This paper proposes development of soft switching scheme for three phase three level DC-DC converter for

different duty cycles to achieve ZVS for all switches. The ZVS is achieved with output inductor and leakage inductor of

transformer. This paper describes the main operational modes of proposed converter for different duty cycle and simulation

results are observed and compare the switching losses of proposed converter with and without ZVS.

KEYWORDS—Zero Voltage Switching (ZVS), Three Phase Three Level (TPTL),DC-DC converter ,Pulse width modulation

,Duty cycle ,Soft switching.

I. INTRODUCTION

In high voltage high power applications the ordinary

converters exists many problems like stress on switches,

switching losses, EMI etc.... These problems can be

eliminated by using ZVS and ZCS converters. In ZVS, the

switches are turned on and off at zero voltages and in ZCS,

the switches are turned on and off at zero currents. As a

result power reduces almost to a least value, by which the

stress on the switches can be reduced .Full-bridge dc/dc

converters have been widely used in medium to high power

applications to further reduce the stress on switches for high

power application TPTL was proposed. With three phase

architecture the converter has the superior features

including lower current rating of switches reducing input

output current ripple allowing small size filter requirement.

Although predominant characteristics exist in TPTL soft

switching has not been achieved which limits the switching

frequency and power loss. The use of Asymmetrical duty

cycle in the three phase three level dc/dc converter was

proposed in order to achieve ZVS commutation over a wide

load range.

II. PROPOSED TPTL DC/DC CONVERTER FOR

DIFFERENT DUTY CYCLES

Fig. 1 shows the circuit configuration of TPTL converter in

which, a three-phase transformer with Δ–Y connection is

employed for the smaller turns ratios and transformer VA

rating . As shown, Lra, Lrb and Lrc are the additional

resonant inductances to widen the ZVS commutation load

range. Llka, Llkb, and Llkc are the equivalent primary

leakage inductances of each phase. Df1 and Df2 are

freewheeling diodes. Css is the flying capacitor, which is in

favor of decoupling the switching transition of Q1,Q3,Q4, and

Q6 . DR1 − DR6 are rectifier diodes. The output filter is

composed of Lf and Cf, and RLd is the load. Fig. 2 shows the

control strategy of proposed converter. To realize the soft- switching for switches, the original interleaved switches

should be designed in a complementary manner, and a short

delay time td is necessary to be introduced between the two

complementary switches to provide an interval for the ZVS

commutation, which is similar to the control strategy of

asymmetrical half-bridge converter .Accordingly, the duty

cycles of Q1,Q3 , and Q5 are served to regulate the output

voltage, while the drive signals of Q4,Q6 , and Q2 are

complementary to that of the Q1,Q3 , and Q5 , respectively

Page 2 of 13

Journal for Studies in Management and Planning

Available at http://edupediapublications.org/journals/index.php/JSMaP/

ISSN: 2395-0463

Volume 04 Issue 03

March 2018

Available online: http://edupediapublications.org/journals/index.php/JSMaP/ P a g e | 161

Fig. 1. Topology configuration of TPTL dc/dc converter.

Q1 Q4 Q1

Q6 Q3 Q6

Q2 Q5 Q2

Fig. 2. Asymmetrical duty cycle control.

III. OPERATION OF PROPOSED TPTL CONVERTER

This section will analyze the operation principles of the TPTL converter under the modified control scheme. The

following assumptions are made for the simplicity before the analysis:

1) all power devices and diodes are ideal;

2) all capacitors and inductances are ideal;

3) the output filter inductance is large enough to be treated as a constant current source during a switching period;

its value equals to output current

4) the inductances of each phase are identical, i.e.,

Llka=Llkb= Llkc= Llk, Lra= Lrb= Lrc= Lr;

5) C1 = C2 = C3 = C4 = C5 = C6 = Cp.

Fig. 3 shows the key waveforms of the TPTL converter with asymmetrical duty cycle control, as seen, the operation of

the TPTL converter can be classified by different modes, according to the duty cycle range and the load current. The

corresponding operation modes are defined as the small duty cycle mode (SDCM), and the large duty cycle mode

(LDCM),respectively,

Q1 Q4 Q1

Q6 Q3 Q6

Q2 Q5 Q2 0

VAB

VBC

VCA

VIN/2 VIN/2

VIN/2

VIN/2 VIN/2

VIN/2 t0 t1 t2 t3 t4 t5 t6

Fig. 3. Key waveforms of the TPTL converter with asymmetrical duty cycle control with SDCM.

Page 3 of 13

Journal for Studies in Management and Planning

Available at http://edupediapublications.org/journals/index.php/JSMaP/

ISSN: 2395-0463

Volume 04 Issue 03

March 2018

Available online: http://edupediapublications.org/journals/index.php/JSMaP/ P a g e | 162

The basic equations of the voltages and currents of the transformer are listed as follows:

VAB + VBC + VCA = 0 (1)

isa + isb + isc = 0 (2)

( )

Where k represents the secondary-to-primary turns ratios of the transformer. The voltage across the leakage

inductance of transformer can be derived from (3.2) and (3.3) and is given as follows

VLlka+ VLlkb+VLlkc= 0 (3.4)

Operational mode 1: t0 ≤ t ≤ t1

Q6 D6 C6

Q1 Cd1

Cd2

Vin Df1

Df2

Css D1

Q2 Lra

Lrc

Llka

Llkb

Llkc

* A B c ia

ipa

ipb

ipc

isa isb isc 1:k

1:k

Tra

Trc

Trb a b c

DR1 DR3 DR5

DR2 DR4 DR6

Vrect

Fig 3.4.4 Operation mode1of the proposed converter

Fig.3.4.4 ShowsQ1,Q2,Q6,and Df2are conducting at the primary side, and DR1 and DR6 are conducting at the

secondary side. VAB= Vin /2, VBC= 0,and VCA= −Vin /2. From (3.1), (3.2), (3.4), and other constraints between voltages

and currents of transformers, the following expressions can be obtained.

(3.5)

(3.6)

Where Vpi and Vsi are the primary voltage and secondary voltage of transformers, I represents the subscripts a, b, and